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B.E./B.Tech.Degree Examinations,Apr/May 2010
Regulations 2008
Fourth Semester
Electronics and Communication Engineering
EC2252 Communication Theory
Time: Three Hours Maximum: 100 Marks
Answer ALL Questions
Part A - (10 x 2 = 20 Marks)
1. How many AM broadcast stations can be accommodated in a 100 kHz bandwidth
if the highest frequency modulating a carrier i s 5 kHz?
2. What are the causes of linear distortion?
3. Draw the block diagram of a method for generating a narrowband FM signal.
4. A carrier wave of frequency 100 MHz i s frequency modulated by a signal
20 sin(200¼ £ 103t):
What is bandwidth of FM signal if the frequency sensitivity of the modulation i s
25kHz=V .
5. When i s a random process called deterministic?
6. A receiver connected to an antenna of resistance of 50­ has an equivalent noise
resistance of 30­. Find the receiver noise ¯gure.
7. What are the characteristics of superheterodyne receivers?
8. What are the methods to improve FM threshold reduction?
9. De¯ne entropy function.
10. De¯ne Rate Bandwidth and Bandwidth e±ciency.

Part B - (5 x 16 = 80 Marks)
11. (a) (i) Draw an envelope detector circuit used for demodulation of AM and ex-
plain its operation. (10)
(ii) How SSB can be generated using Weaver's method? Illustrate with a neat
block diagram. (6)
OR
11. (b) (i) Discuss in detail about frequency translation and frequency division mul-
tiplexing technique with diagrams. (10)
(ii) Compare Amplitude Modulation and Frequency Modulation.
(6)
12. (a) (i) Using suitable Mathematical analysis show that FM modulation produces
in¯nite sideband. Also deduce an expression for the frequency modulated
output and its frequency spectrum. (10)
(ii) How can you generate an FM from PM and PM from FM?
(6)
OR
12. (b) (i) A 20 MHz i s frequency modulated by a sinusoidal signal such that the
maximum frequency deviation is 100 kHz. Determine the modulation index
and approximate bandwidth of the FM signal for the following modulating
signal frequencies,
(1) 1 kHz (2) 100 kHz and (3) 500 kHz. (8)
(ii) Derive the time domain expressions of FM and PM signals.
(8)
13. (a) (i) Give a random process, X(t) = Acos(!t+µ), where A and ! are constants
and µ is a uniform random variable. Show that X(t) is ergodic in both
mean and autocorrelation. (8)
(ii) Write a short note on shot noise and also explain about power spectral
density of shot noise. (8)
OR
13. (b) Write the details about narrow band noise and the properties of quadrature
components of narrowband noise. (16)
14. (a) Derive an expression for SNR at input (SNRc) and output of (SNRo) of a
coherent detector. (16)
OR
14. (b) (i) Explain pre-emphasis and De-emphasis in detail. (10)
(ii) Compare the performances of AM and FM systems. (6)
15. (a) (i) Find the code words for ¯ve symbols of the alphabet of a discrete memory-
less source with probability f0.4, 0.2, 0.2, 0.1, 0.1g, using Hu®man coding
and determine the source entropy and average code word length. (10)
(ii) Discuss the source coding theorem. (6)
OR
15. (b) (i) Derive the channel capacity of a continuous band limited white Gaussian
noise channel. (10)
(ii) Discuss about rate distortion theory. (6)

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B.E./B.Tech.Degree Examinations, November/December 2010
Regulations 2008
Fourth Semester
Electronics and Communication Engineering (ECE)
EC2252 Communication Theory
( Common to PTEC 2252 Communication Theory for B.E.(Part -Time)
Third Semester ECE - Regulations 2009)
Time: Three Hours Maximum: 100 Marks
Answer ALL Questions
Part A - (10 x 2 = 20 Marks)
1. How many AM broadcast stations can be accommodated in a 100 kHz bandwidth
if the highest frequency modulating a carrier i s 5 kHz?
2. State the applications of FDM.
3. Illustrate the relationship between FM and PM, with block diagrams.
4. Compare the transmission bandwidth required for Narrowband FM and Wide band
FM.
5. De¯ne a random variable. Specify the sample space and the random variable for a
coin tossing experiment.
6. What i s white noise? Give its characteristics.
7. De¯ne threshold e®ect in AM receiver.
8. De¯ne pre-emphasis and de-emphasis.
9. A source generates 3 messages with probability 0.5, 0.25, 0.25. Calculate source
entropy.
10. De¯ne Rate Bandwidth and Bandwidth effciency.

Part B - (5 x 16 = 80 Marks)
11. (a) (i) With the help of a neat diagram, explain the generation of DSB-SC using
Balanced modulator. (8)
(ii) Write about the coherent detection method in detail for DSB-SC and SSB-
SC. What happens when there i s phase mismatch? (8)
OR
11. (b) (i) Explain the concept of Frequency Translation. (4)
(ii) With aid of block diagram explain the principle of FDM. (8)
(iii) Illustrate the formation of Basic group and super group. (4)
12. (a) (i) De¯ne frequency modulation. Draw the FM waveform. Derive an expres-
sion for single tone frequency modulation.
(2 + 2 + 6)
(ii) Compare Narrowband and Wideband FM. (6)
OR
12. (b) (i) A 20 MHz i s frequency modulated by a sinusoidal signal such that the max-
imum frequency deviation i s 100 kHz. Determine the modulation index
and approximate bandwidth of the FM signal for the following modulating
signal frequencies,
(1) 1 kHz (2) 100 kHz and (3) 500 kHz. (8)
(ii) Derive the time domain expressions of FM and PM signals.
(8)
13. (a) (i) List the di®erent types of random process and give the de¯nitions. (10)
(ii) Write short notes on shot noise. (6)
OR
13. (b) (i) A mixer stage has a noise ¯gure of 20 dB and this i s preceded by an
ampli¯er that has a noise ¯gure of 9 dB and an available power gain of 15
dB. Calculate the overall noise ¯gure referred to the input. (8)
(ii) A receiver has a noise ¯gure of 12 dB and it is fed by a low noise ampli¯er
that has a gain of 50 dB and a noise temperature of 90 K. Calculate the
noise temperature of the receiver and the overall noise temperature of the
receiving system. Take room temperature as 290 K. (8)
14. (a) Derive the expression for ¯gure of merit of a AM receiver using envelope de-
tection. What do you infer from the expression? (16)
OR
14. (b) De¯ne and explain FM Threshold e®ect. With suitable diagram, explain
threshold reduction by FMFB demodulator. (16)
15. (a) (i) An Analog signal i s band limited to `B' Hz and sampled at Nyquist rate.
The sampled signals are quantized into 4 levels. Each level represents
one message. The probability of occurrence of the four messages are
p1=p3=1/8; p2=p4=3/8. Find out information rate of the source. (6)
(ii) Five source messages are probable to appear as m1 = 0:4, m2 = 0:15,
m3 = 0:15, m4 = 0:15, m5 = 0:15. Find coding e±ciency for (1) Shanon-
Fano coding, (2) Hu®man coding.
(10)
OR
15. (b) (i) Derive the channel capacity for Binary Symmetric channel.
(6)
(ii) Derive the channel capacity for band limited, power limited Gaussian
Channel. (10)

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B.E./B.Tech. DEGREE EXAMINATION, APRIL/MAY 2010
Fourth Semester
Electronics and Communication Engineering
EC2251 — ELECTRONIC CIRCUITS – II
(Regulation 2008)
Time: Three hours Maximum: 100 Marks
Answer ALL Questions
PART A — (10 × 2 = 20 Marks)
1. What is the impact of negative feedback on noise in circuits?
2. Define sensitivity and desensitivity of gain in feedback amplifiers.
3. Mention two essential conditions for a circuit to maintain oscillations.
4. In a RC phase shift oscillator, if = = = K R R R 200 3 2 1 and
pF C C C 100 3 2 1 = = = , find the frequency of the oscillator.
5. Define tuned amplifier.
6. Define the term unloaded Q factor.
7. Give two applications of bistable multivibrator.
8. A 20 KHz, 75% duty cycle square wave is used to trigger continuously, a
monostable multivibrator with a triggered pulse duration of s µ 5 . What will be
the duty cycle of the waveform at the output of the monostable multivibrator?
9. Mention any two applications of blocking oscillator.
10. What is the function of time base circuit?
PART B — (5 × 16 = 80 Marks)
11. (a) (i) Explain how negative feedback acts on bandwidth, distortion, Input
Impedance and Output Impedance of a circuit. (8)
(ii) An amplifier has a mid-frequency gain of 100 and a bandwidth
of 200 KHz.
(1) What will be the new bandwidth and gain, if 5% negative
feedback is introduced?
(2) What should be the amount of feedback, if the bandwidth is to
be restricted to 1 MHz? (8)
Or
(b) (i) Explain voltage series and voltage shunt feedback connections. (8)
(ii) Explain Nyquist criterion to analyse the stability of feedback
amplifiers. (8)
12. (a) (i) Explain Armstrong oscillator and derive its frequency of oscillation.
(8)
(ii) A Colpitts oscillator is designed with pF C 100 1 = and
pF C 7500 2 = . The inductance is variable. Determine the range of
inductance values, if the frequency of oscillation is to vary between
950 KHz and 2050 KHz. (8)
Or
(b) (i) Explain Wien bridge oscillator and derive its frequency of
oscillation. (10)
(ii) Write a note on frequency stability of oscillators. (6)
13. (a) (i) Discuss about double tuned voltage amplifier. (8)
(ii) Discuss the effect of bandwidth on cascading single tuned
amplifiers. (8)
Or
(b) (i) Explain class ‘C’ tuned amplifier and derive its efficiency. (10)
(ii) Explain Hazeltine Neutralization Method. (6)
14. (a) (i) Sketch and define transistor switching times. (8)
(ii) What is a clipper? Explain the operation of positive and negative
diode clippers with waveforms. (8)
Or
(b) (i) Explain astable multivibrator with neat sketch of waveforms at
collector and base of transistors used in the circuit. (10)
(ii) Determine the value of capacitors to be used in an astable
multivibrator to provide a train of pulse s µ 2 wide at a repetition
rate of 100 KHz if = = k R R 20 2 1 . (6)
15. (a) (i) Explain about astable blocking oscillator with base timing. (10)
(ii) The diode controlled astable blocking oscillator has the parameters
10 = CC V V, V VB 5 . 0 = , 2 = n , = K R 5 . 1 , =10 f R , V Vr 9 = ,
mH L 3 = and pF C 100 = . Calculate the frequency of oscillation and
duty cycle. (6)
Or
(b) Write about Miller Integrator and Current-Time Base Circuit with
waveform. (16)
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B.E./B.Tech. DEGREE EXAMINATION, NOVEMBER/DECEMBER 2011.
Sixth Semester
Computer Science and Engineering
CS 2354 — ADVANCED COMPUTER ARCHITECTURE
(Regulation 2008)
Time : Three hours Maximum : 100 marks
Answer ALL questions.
PART A — (10 × 2 = 20 marks)
1. What is instruction level parallelism?
2. What are the advantages of loop unrolling?
3. What are the limitations of VLIW?
4. What is the use of branch-target buffer?
5. Distinguish between shared memory multiprocessor and message-passing multiprocessor.
6. Differentiate multithreading computers from multiprocessor systems
7. Define the terms cache miss and cache hit.
8. What is RAID?
9. What is a multi-core processor?
10. What is a cell processor?


PART B — (5 × 16 = 80 marks)


11. (a) (i) Explain the data and name dependencies with suitable example. (10)
(ii) Discuss about the benefits and limitations of static branch prediction and dynamic branch prediction (6)
Or
(b) Briefly explain how to overcome data hazards with dynamic scheduling using Tomasula’s approach. (16)
12. (a) (i) Describe the architecture of Itanium processor with the help of a block diagram. (8)
(ii) Explain how ILP is achieved in EPIC processors (8)
Or
(b) (i) Describe the architectural features of IA64 processor in detail.(8)
(ii) What are the advantages and disadvantages of software-based and hardware-based speculation mechanism? (8)
13. (a) (i) Briefly compare instruction level parallelism with thread-level parallelism. (8)
(ii) Explain the basic architecture of a distributed memory multiprocessor system. (8)
Or
(b) (i) Explain various memory consistency models in detail. (10)
(ii) What is multithreading and what are the advantages of multithreading? (6)
14. (a) What is meant by cache coherence problem? Describe various protocols for cache coherence. (16)
Or
(b) Briefly explain various I/O performance measures. (16)
15. (a) (i) Describe the architecture of typical CMT processor. (8)
(ii) Discuss the design issues for simultaneous multithreading. (8)
Or
(b) (i) Explain the architectural features of IBM cell processor in detail. (10)
(ii) Briefly compare SMT and CMP architectures. (6)
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B.E./B.Tech. DEGREE EXAMINATION, APRIL/MAY 2011
Sixth Semester
Computer Science and Engineering
CS 2354 — ADVANCED COMPUTER ARCHITECTURE
(Regulation 2008)
Time : Three hours Maximum : 100 marks
Answer ALL questions
PART A — (10 × 2 = 20 marks)
1. What is loop unrolling? and what are its advantages?
2. Differentiate between static and dynamic branch prediction approaches.
3. What is fine-grained multithreading and what is the advantage and
disadvantages of fine-grained multithreading?
4. What a VLIW processor?
5. What is sequential consistency?
6. State the advantages of threading.
7. Differentiate between write-through cache and snoopy cache.
8. Compare SDRAM with DRAM.
9. What is multi–core processor and what are the application areas of multi-core
processors?
10. What is a Cell Processor?
PART B — (5 × 16 = 80 marks)
11. (a) Briefly describe any techniques to reduce the control hazard stalls. (16)
Or
(b) (i) Discuss about any two compiler techniques for exposing ILP in
detail. (8)
(ii) Explain how ILP is achieved using dynamic scheduling. (8)
12. (a) (i) Describe the architectural features of IA 64 Processors in detail. (10)
(ii) Explain the architecture of a typical VLIW processor in detail. (6)
Or
(b) (i) Describe the architectural features of Itanium Processor. (10)
(ii) Explain how instruction level parallelism is achieved in EPIC
processor. (6)
13. (a) (i) Describe the basic structure of a centralized shared-memory
multiprocessor in detail. (6)
(ii) Describe the implementation of directory-based cache coherence
protocol. (10)
Or
(b) (i) What are the advantages and disadvantages of distributed-memory
Multiprocessors? Describe the basic structure of a distributedmemory
multiprocessor in detail. (8)
(ii) Describe sequential and relaxed consistency model. (8)
14. (a) (i) With suitable diagram, explain how virtual address is mapped to L2
cache address. (10)
(ii) Discuss about the steps to be followed in designing I/O system. (6)
Or
(b) Describe the optimizations techniques used in compilers to reduce cache
miss rate. (16)
15. (a) (i) Describe the features of SUN CMP architecture in detail. (6)
(ii) What are Multi Core processors? Explain how a multi core
processors works. (10)
Or
(b) (i) Discuss about the SMT kernel structure in detail. (8)
(ii) Describe the architecture of the IBM Cell Processor in detail. (8)
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M.E/M.Tech DEGREE EXAMINATION, JUNE 2010
First Semester
Computer Science and Engineering
CS9211 – COMPUTER ARCHITECTURE
(Common to M.Tech - Information Technology)
        (Regulation 2009)
Time: Three hours                                                                               Maximum: 100 Marks
                                                     Answer all the questions
                                                    Part A – (10*2=20 Marks)
1.      State the principle of locality and its types.
2.      What are the choices for encoding instruction set.
3.      What is speculation? Give an example.
4.      Mention the effects of imperfect alias analysis.
5.      What is loop unrolling?
6.      Give the uses of sentinel.
7.      Define multiprocessor cache coherence.
8.      What are the approaches used for multithreading?
9.      Which block should be replaced on a cache Miss?
10.  How is cache performance improved?
    Part B – (5*16=80 Marks)
11.  (a)(i)Explain the operations designed for media and signal processing. (10)
    (ii)Explain the ways in which a computer architect can help the compiler writer. (6)
                                                            (Or)
(b)(i)Discuss the addressing modes used for signal processing instructions. (7)
     (ii)Describe the addressing modes and instructions designed for control flow. (9)

12.  (a)Explain the techniques to overcome data hazards with dynamic scheduling. (16)
(Or)
(b)Describe the limitations of Instruction level Parallelism. (16)

13.  (a)(i)Explain the basic VLIW approach used for static multiple issues. (8)
    (ii)Enumerate the crosscutting issues in hardware and s/w speculation mechanisms. (8)
                                                            (Or)
(b)(i)Explain the hardware support for exposing more parallelism at compile time. (8)
    (ii)Describe the basic compiler techniques for exposing ILP. (8)
14.  (a)(i)Describe the design challenges in SMT processors. (8)
    (ii)Discuss the performance of shared memory multiprocessors. (8)
                                                            (Or)
(b)(i)Explain synchronization mechanisms designed for large scale multiprocessors. (9)
    (ii)Discuss the details of memory consistency models. (7)

15.  (a)(i)Explain the concept of miss penalty and out of order execution in processors. (6)
    (ii)Discuss the methods of interface between CPU and memory. (10)
                                                            (Or)
(b)Discuss in detail the different levels of RAID. (16)
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M.E/M.Tech DEGREE EXAMINATION, JANUARY 2010
First Semester
Computer Science and Engineering
CS9211 – COMPUTER ARCHITECTURE
(Common to M.Tech - Information Technology)
        (Regulation 2009)
Time: Three hours                                                                               Maximum: 100 Marks
                                                     Answer all the questions
                                                    Part A – (10*2=20 Marks)
1.      What is hazard? State its types.
2.      Mention the techniques available to measure the performance.
3.      What is dynamic scheduling?
4.      Give the limitation of ILP.
5.      Distinguish between hardware and software speculation mechanisms.
6.      What is static branch prediction?
7.      What are the synchronization issues?
8.      What is multithreading?
9.      Define cache miss penalty?
10.  What is RAID?
                                        Part B – (5*16 = 80 Marks)
11.  (a)How does one classify ISA? Discuss their design issues. (16)
(Or)
(b)What is pipelining? Explain various hazards involved in implementing pipelining. (16)

12.  (a)Explain the instruction level parallelism with dynamic approaches. (16)
(Or)
(b)What is dynamic hardware prediction? Explain it in detail. (16)

13.  (a)Explain the different hardware support for exposing ILP. (16)
(Or)
(b)Explain the different hardware support for more parallelism. (16)

14.  (a)Explain distributed shared memory architecture with necessary life cycle diagram. (16)
(Or)
(b)(i)Differentiate software and hardware multithreading approaches. (8)
   (ii)Explain the models of memory consistency. (8)

15.  (a)How does one reduce cache miss penalty and miss rate? Explain. (16)
(Or)
(b)What are the ways available to measure the I/O performance? Explain each of them in detail. (16)
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B.E./B.Tech. DEGREE EXAMINATION, APRIL/MAY 2011
Sixth Semester
Computer Science and Engineering
CS 2353 — OBJECT ORIENTED ANALYSIS AND DESIGN
(Common to Information Technology)
(Regulation 2008)
Time : Three hours Maximum : 100 marks
Answer ALL questions
PART A — (10 × 2 = 20 marks)
1. What is Object Oriented Analysis and Design?
2. Define the inception step.
3. What is a Domain Model?
4. Define Aggregation and Composition.
5. What is the use of System sequence diagram?
6. List the relationships used in class diagram.
7. What is Design Pattern?
8. Define Coupling.
9. What is the use of operation contracts?
10. Give the meaning of Event, State and transition.
PART B — (5 × 16 = 80 marks)
11. (a) Briefly explain the different phases of Unified Process.
Or
(b) Explain with an example, how usecase modeling is used to describe
functional requirements. Identify the actors, scenario and use cases for
the example.
12. (a) Describe the strategies used to identify conceptual classes. Describe the
steps to create a domain model used for representing conceptual classes.
Or
(b) Explain about activity diagram with an example.
13. (a) Illustrate with an example, the relationship between sequence diagram
and use cases.
Or
(b) Explain with an example Interaction diagram.
14. (a) Explain about GRASP Patterns.
Or
(b) Write short notes on adapter, singleton, factory and observer patterns.
15. (a) Explain about implementation model (mapping design to code).
Or
(b) Discuss about UML deployment and component diagrams. Draw the
diagrams for a banking application.
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B.E./B.Tech. DEGREE EXAMINATION, NOVEMBER/DECEMBER 2011.
Sixth Semester
Computer Science and Engineering
CS 2353 — OBJECT ORIENTED ANALYSIS AND DESIGN
(Common to Information Technology)
(Regulation 2008)
Time : Three hours                                                                     Maximum : 100 marks
Answer ALL questions.
PART A — (10 × 2 = 20 marks)
1. List out any four reasons for the complexity of software.
2. What do you mean by use cases and actors?
3. Give the hint to identify the attributes of a class.
4. Define swim lane.
5. What do you mean by sequence diagram? Mention its use.
6. What do you mean by sequence number in UML? Where and for what it is
used?
7. Distinguish between coupling and cohesion.
8. Write a note on Patterns.
9. Define component with an example.
10. How will you reflect the version control information in UML diagram?


PART B — (5 × 16 = 80 marks)


11. (a) What do you mean by Unified Process in OOAD? Explain the phases with suitable diagrams. (16)
Or
(b) By considering the Library Management system, perform the Object Oriented System Development and give the use case model for the same (use include, extend and generalization). (16)
12. (a) Explain the relationships that are possible among the classes in the UML representation with your own example. (16)
Or
(b) Explain the following with an example :
(i) Conceptual class diagram
(ii) Activity Diagram. (8 + 8)
13. (a) With a suitable example explain how to design a class. Give all possible representation in a class (name, attribute, visibility, methods, responsibilities). (16)
Or
(b) What do you mean by interaction diagrams? Explain them with a suitable example. (16)
14. (a) What is GRASP? Explain the design patterns and the principles used in it. (16)
Or
(b) What is design pattern? Explain the GoF design patterns. (16)
15. (a) Explain the state chart diagram with a suitable example. Also define its components and use. (16)
Or
(b) Consider the Hospital Management System application with the following requirements
(i) System should handle the in-patient, out-patient information through receptionist.
(ii) Doctors are allowed to view the patient history and give their prescription.
(iii) There should be a information system to provide the required information.
Give the state chart, component and deployment diagrams.(6 + 6 + 4)
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